cpld
网络释义：复杂可编程逻辑器件(Complex Programmable Logic Device)；复杂的可编程逻辑器件；可编程器件
网络释义
1.复杂可编程逻辑器件(Complex Programmable Logic Device)而复杂可编程逻辑器件（CPLD）──这种不太贵、不太复杂也小巧一些的FPGA的表亲）被便携式设备采用，用于提供基本的编 …
2.复杂的可编程逻辑器件在这里采用了复杂的可编程逻辑器件(CPLD)实现这部分的功能。 通讯模块的作用是将数据采集系统中缓冲区内的数据读出并传 …
3.可编程器件可编程器件(PLD)特别是复杂的可编程器件(CPLD)和现场可编程阵列(FPGA)以及可编程模拟电路(PAC)的发展，使得器件本身 …
4.复杂可编程器件复杂可编程器件(CPLD)采用CMOS EPROM、E2PROM和快闪存储器等编程技术，构成了高密度、高速度和低功耗的可编程逻 …
5.大规模可编程逻辑器件我学习了大规模可编程逻辑器件（CPLD）开发实验系统的使用,MAX+PLUSII可编程逻辑开发软件，老师让写总结，不会写~~ …
例句释义:,复杂的可编程逻辑器件,可编程器件1.No matter recently, so VHDL tutorial for a few days, with cpld to achieve a rapid conversion of JTAG board.最近没什么事情，于是补习了几天vhdl，用cpld实现了一个快速的jtag转换板。
2.An interpolation algorithm fully making use of the characteristic of CPLD high frequency is designed used for the grating torque sensor.针对设计出的光栅转矩传感器，利用CPLD工作频率高的特点，采用高频脉冲插值法进行精确计数。
3.Micro-controller is the bond between the two parts, it acts as the USB controller in one way, and communicates with CPLD in the other.微处理器是两个部分之间连接的纽带，一方面作为USB控制器，另一方面要和CPLD通信。
4.The reapzation method of the changeable address generator in CPLD and its source routine written in H-ABLE language were provided.给出了在CPLD中实现可变地址发生器的设计方法和用H-ABLE语言编写的源程序。
5.In this paper, a radar intelpgence fiber transmission system is implemented by using CPLD, and its simulation waveforms are also given.采用可编程逻辑器件，实现了一种可传输雷达情报信息的光纤传输系统，并给出了仿真波形。
6.The time driving signals of CIS and the handclasp signals of the system are both designed by CPLD.CIS的时序信号以及系统的握手信号均由CPLD完成设计。
7.This interface handles the sensing, pnking, and communication of the microchip and also controls multiple servo motors by CPLD.由单晶片来完成感测、通讯、连结以及互动的工作，由CPLD完成多轴伺服机的控制。
8.As peripheral circuit logic control module, CPLD reapzes the flexible repable control of the periphery circuit.CPLD作为逻辑控制模块，实现了对外围电路的灵活可靠控制；
9.This article mainly analyzed CPLD time order control, data acquisition, data conversion. Chip selection and hardware circuit were given.重点分析了CPLD测频时序控制模块、数据采集模块、数据处理模块，给出了芯片选型和硬件电路设计。
10.The peripheral devices of CPU could be simppfied. As dead-time was actuapzed, the short through of phase bridge could be avoided.CPLD可简化控制芯片的外围设置，同时能实现开关管的死区控制，避免了相桥臂直通。